Memory devices (which are sometimes referred to herein as “memories”) are typically provided as internal, semiconductor, integrated circuits in computers or other electronic systems. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory.
Flash memory devices have developed into a popular source of non-volatile memory for a wide range of electronic applications. Flash memory devices typically use a one-transistor memory cell that allows for high memory densities, high reliability, and low power consumption. Changes in threshold voltage of the cells, through programming of a charge storage structure, such as floating gates or trapping layers or other physical phenomena, determine the data state of each cell. Common electronic systems that utilize flash memory devices include, but are not limited to, personal computers, personal digital assistants (PDAs), digital cameras, digital media players, digital recorders, games, appliances, vehicles, wireless devices, cellular telephones, and removable memory modules, and the uses for flash memory continue to expand.
Flash memory typically utilizes one of two basic architectures known as NOR flash and NAND flash. The designation is derived from the logic used to read the devices. In NOR flash architecture, a string of memory cells is coupled in parallel with each memory cell coupled to a data line, such as those typically referred to as digit (e.g., bit) lines. In NAND flash architecture, a string of memory cells is coupled in series with only the first memory cell of the string coupled to a bit line.
As the performance and complexity of electronic systems increase, the requirement for additional memory in a system also increases. However, in order to continue to reduce the costs of the system, the parts count must be kept to a minimum. This can be accomplished by increasing the memory density of an integrated circuit by using such technologies as multilevel cells (MLC). For example, MLC NAND flash memory is a very cost effective non-volatile memory.
Data integrity, in the form of bit errors, can be affected by more than one part of a memory device. For example, bit error rates may arise from data path bit errors and from array bit errors. Array path errors typically are caused by failure of data cells to properly program, or by cells that have threshold voltage shifts from their desired threshold voltages.
A data path in a memory device, such as a NAND memory device, comprises a physical path between an array of memory cells, registers such as a page register and a cache register, and input/output (I/O) pads, with conductive traces connecting the components. I/O pads are typically bonded out external to the memory device, and can be physically separated from the array and registers by a large portion of a die. Data path errors can occur due to, for example, signal integrity issues, power delivery issues, ground bounce, noise, and the like. Such data path errors can further corrupt or increase a rate or severity of array path errors (array errors are cell failure or Vt shift). Data path errors can be sporadic, but largely unpredictable. Data path bit errors may be referred to as hard errors.
A controller for a memory device typically has available an amount of error correction allowing the controller to fix some level of raw bit error rates (RBER). With schemes for error correction, such as low density parity check (LDPC) and other types of error correction, hard errors are more difficult to correct, and use much more of any available amount of error correction. When a memory device error occurs, a user cannot normally distinguish which type of error, data path bit error or array bit error, caused the error.
For the reasons stated above and for other reasons that will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for distinguishing between data path bit errors and array bit errors in memories.